CMSIS-Core (Cortex-M)  
CMSIS-Core support for Cortex-M processor-based devices
 
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API Reference
Here is a list of all modules:
[detail level 12]
 Device capabilitiy definesDefines to configure and check device capabilities
 Version ControlVersion #define symbols for CMSIS release specific C/C++ source code
 Compiler ControlCompiler agnostic #define symbols for generic C/C++ source code
 Peripheral AccessNaming conventions and optional features for accessing peripherals
 System and Clock ConfigurationFunctions for system and clock setup available in system_device.c
 Interrupts and Exceptions (NVIC)Functions to access the Nested Vector Interrupt Controller (NVIC)
 Core Register AccessFunctions to access the Cortex-M core registers
 Intrinsic Functions for CPU InstructionsFunctions that generate specific Cortex-M CPU Instructions
 Intrinsic Functions for SIMD InstructionsAccess to dedicated SIMD instructions available on Armv7E-M (Cortex-M4/M7), Armv8-M Mainline (Cortex-M33/M35P), and Armv8.1-M (Cortex-M55/M85)
 FPU FunctionsFunctions that relate to the Floating-Point Arithmetic Unit
 MVE FunctionsFunctions that relate to the MVE (Cortex-M Vector Extensions) Unit
 MPU Functions for Armv6-M/v7-MFunctions that relate to the Memory Protection Unit
 MPU Functions for Armv8-MFunctions that relate to the Memory Protection Unit
 PMU Functions for Armv8.1-MFunctions that relate to the Performance Monitoring Unit
 Systick Timer (SYSTICK)Initialize and start the SysTick timer
 Debug AccessDebug Access to the Instrumented Trace Macrocell (ITM)
 TrustZone for Armv8-M/v8.1-MFunctions that related to optional Armv8-M and Armv8.1-M security extension
 Cache Functions (Level-1)Functions for level-1 instruction and data cache