Device capabilitiy defines | Defines to configure and check device capabilities |
Version Control | Version #define symbols for CMSIS release specific C/C++ source code |
Compiler Control | Compiler agnostic #define symbols for generic C/C++ source code |
Peripheral Access | Naming conventions and optional features for accessing peripherals |
System and Clock Configuration | Functions for system and clock setup available in system_device.c |
Interrupts and Exceptions (NVIC) | Functions to access the Nested Vector Interrupt Controller (NVIC) |
Core Register Access | Functions to access the Cortex-M core registers |
Intrinsic Functions for CPU Instructions | Functions that generate specific Cortex-M CPU Instructions |
Intrinsic Functions for SIMD Instructions | Access to dedicated SIMD instructions available on Armv7E-M (Cortex-M4/M7), Armv8-M Mainline (Cortex-M33/M35P), and Armv8.1-M (Cortex-M55/M85) |
FPU Functions | Functions that relate to the Floating-Point Arithmetic Unit |
MVE Functions | Functions that relate to the MVE (Cortex-M Vector Extensions) Unit |
►MPU Functions for Armv6-M/v7-M | Functions that relate to the Memory Protection Unit |
MPU Functions for Armv8-M | Functions that relate to the Memory Protection Unit |
►PMU Functions for Armv8.1-M | Functions that relate to the Performance Monitoring Unit |
Systick Timer (SYSTICK) | Initialize and start the SysTick timer |
Debug Access | Debug Access to the Instrumented Trace Macrocell (ITM) |
►TrustZone for Armv8-M/v8.1-M | Functions that related to optional Armv8-M and Armv8.1-M security extension |
►Cache Functions (Level-1) | Functions for level-1 instruction and data cache |